1. Field of the Invention
The invention relates generally to the device configuration and manufacturing methods for fabricating the semiconductor power devices for more efficient DC/DC converter applications. More particularly, this invention relates to an improved and novel manufacturing process and device configuration for providing the MOSFET device with depletion mode channel regions for combining with an enhancement mode MOSFET device to improve the operation efficiency of the DC/DC converters.
2. Description of the Related Art
The electronic devices applied for carrying out a function of DC-to-DC conversion are still confronted with a difficulty that the devices implemented with an enhancement mode MOSFET are limited by a problem of increased power dissipation. Specifically, an increase of power dissipation may occur in a DC-DC converter implemented with a circuit shown in FIG. 1A as disclosed in U.S. Pat. No. 6,593,620. FIG. 1B is a timing diagram for showing the control signals GDS1 and GDS 2 for driving the switches S1 and S2 respectively at times T1, T2 and T3, T4. A current passes through the built-in body diode D2 of the enhancement mode MOSFET within the time period between T2 and T3 will cause a voltage drop about 0.7 volts and thus increasing the power dissipation.
For the purpose of resolving these difficulties, FIG. 1C shows another circuit implemented to transmit the current within the time period between T2 and T3 through a Schottky rectifier instead of the built in diode. FIG. 1B shows a DC/DC converter implemented with an enhancement mode MOSFET for the high side and an enhancement mode MOSFET shunt with a Schottky diode rectifier for the low side. The voltage drop is reduced to about 0.4 volts. In comparison the converter shown in FIG. 1A, the power dissipation is significantly reduced. However, the circuit of FIG. 1B encounters another problem because such circuit has a high reverse leakage current.
Therefore, a need still exists in the art of power semiconductor device design and manufacture to provide new manufacturing method and device configuration in forming the semiconductor power devices such that the above discussed problems and limitations can be resolved.